Transfer optimization while adding of binary numbers in number-theoretic basis Rademacher

2016;
: pp. 88 - 101
1
National University of Water and Environmental Engineering, Department of Computer Engineering
2
National University of Water and Environmental Engineering, Department of Computer Engineering

The mathematical model of computer circuit as directed acyclic graph for the construction of parallel adders with parallel transfer method. Demonstrated communication between computing steps directed acyclic graph and the process of transfer of units in the scheme multibit adder that can determine the optimal number of transfers in the scheme multibit parallel adder with parallel transfer method in theoretical and numerical basis Rademacher. The process of adding binary numbers in the adder circuit uses an algorithm logarithmic summation.

  1. Borisenko, AA Replica on the Fibonacci microprocessors [Electronic resource] / AA Borisenko // Academy of Trinitarianism. - 01/09/2011 - El. No. 77-6567, pub. 16805. - Access Mode: \ www / URL: http://www.trinitas.ru/eng/doc/0232/009a/02321223.htm.
  2. Sajesh Kumar, Mohamed Salih (2012) Efficient Carry Select Adder Design for FPGA. Procedia Engineering, 30, 449 - 456 http://www.sciencedirect.com/science/article/pii/S1877705812008946  
  3. Yogita Hiremath (2014) A Novel 8-bit Carry Select Adder using 180nm CMOS Process Technology. International Journal of Emerging Engineering Research and Technology, Volume 2, Issue 6, September 187-194 http://www.ijeert.org/pdf/v2-i6/25.pdf
  4. Balasubramanian P., Jacob Prathap Raj, C., Anandi, S., Bhavanidevi, U., Mastorakis, NE (2013) Mathematical Modeling of Timing Attributes of Self-Timed Carry Select Adders. Recent Advances in Circuits, Systems, Telecommunications and Control, 228-243 http://www.wseas.us/e-library/conferences/2013/Paris/CCTC/CCTC-34.pdf.
  5. Chithra, M., Omkareswari, G. (2013) 128-bit Carry Select Adder Having Less Area And Delay International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering Vol. 2 Issue 7, July 2013, 3112-3118 http://www.ijareeie.com/upload/2013/july/35E_128-BIT.pdf.
  6. Kunitskaya S.Yu. Synthesis of the addition device in a binary-triple redundant number system [Electronic resource] / S. Yu. Kunitskaya / / Bulletin of the ChTTU: Information Technologies, Computer Engineering and Automatics, 2015, No. 1, S. 86-90. - Mode of access: \ www / URL: http://www.irbis-nbuv.gov.ua/cgi bin / irbis_nbuv / cgiirbis_64.exe? I21DBN = LINK & P21DBN = UJRN & Z21ID = & S21REF = 10 & S21CNR = 20 & S21STN = 1 & S21FMT = ASP_meta & C21COM = S & 2_S21P03 = FILA = & 2_S21STR = Vchdtu_2015_1_16
  7. Tang, Y., Liu, L., Tech, G., Tatemura, J., Hacigums, H. (2015). KTV-Tree: Interactive Top-K Aggregation in the Dynamic Large Dataset in the Cloud. IEEE 35th International Conference on Distributed Computing Systems Workshops, June 29 2015-July 2 2015, 136-142 https://pdfs.semanticscholar.org/cb3e/ae43d0e3465cd52acf73de974bcc374e66....
  8. Martyniuk, TB Analysis of Operational Basis for Neural Network Intelligent systems [electronic resource] / T. B. Martynyuk, A. V. Kozhemyako, N. A. Denisyuk, T. Yu. Pozdnyakova // Information Technologies and Computer Engineering, 2015, No. 2, S. 83- 87 - \ www / URL: HTTP://WWW.GOOGLE.COM.UA/URL URL=HTTP://IRBISNBUV.GOV.UA/Cgibin/IRBIS_NBUV/CGIIRBIS_64. EXE%3FC21COM%3D2%26I21DBN%3DUJRN%26P21DBN%3DUJRN%26IMAGE_FILE_DOWNLOAD%3D1% 26IMAGE_FILE_NAME%
  9. 3DPDF/ITKI_2015_2_15.PDF & RCT = J & FRM = 1 & Q = & ESRC = S & SA = U & VED = 0AHUKEWJ0PMKMXLJMAHWKIPOKHFS6BOGQFGG7MAG & USG = AFQJCNG8MUVPB_G7LAFHXW8ZVNYKN3HC0A.
  10. Tsmots, I. modified method and VLSI device structure of the group summation for neyroelementa [electronic resource] / I. Tsmots O. Skorokhoda , B. Balich // Bulletin of the National University "Lviv Polytechnic". - 2012. - No. 732: Computer Science and Information Technologies. - P. 51-57. - Access mode: \ www / URL: http://ENA.LP.EDU.UA:8080/BITSTREAM/NTB/14865/1/9_TSMOTS_51_57_732.PDF.
  11. Wu, C., Wan, Sh., Hou, W., Zhang, L., Xu, J., Cui, Ch., Wang, Y., Hu, J., Tan, W. (2015) A A survey of advancements in nucleic acid-based logic gates and computing for applications in biotechnology and biomedicine. Chem Commun. 2015.51, 3723-3734 https://www.chem.ufl.edu/wp-content/uploads/sites/39/pubs/2015/A%20Surve... based on% 20Logic% 20Gates% 20and% 20Computing% 20for% 20Applications% 20in% 20Biotechnology% 20and% 20Biomedicine.pdf.
  12. Seelig, Georg and Soloveichik, David (2009) Time-Complexity of Multilayered DNA Strand Displacement Circuits. In: DNA computing and molecular programming. Lecture Notes in Computer Science. No.5877. Springer, Berlin, pp. 144-153. http://www.dna.caltech.edu/Papers/CRN_circuit_complexity.pdf.
  13. Gamayun, VP On the development of multi-operative computing structures [Text] / VP Gamayun // Control systems and machines. - 1990. - № 4. - P. 31 - 33.
  14. Gamayun, V.P. Author's abstract. dis Dr. Tech. Sciences: 05.13.13 / VP Gamayun - NAS of Ukraine. Institute of Cybernetics them. VM Glushkov K., - 1999. - 33 p.
  15. Martyniuk, T. B., Methods and means of parallel transformations of vector data arrays [Monograph] / T. B. Martynyuk, V. V. Khomyuk - Vinnytsia: UNIVERSUM-Vinnytsia, 2005. - 202 p.
  16. Martyniuk, T. B. Recursive algorithms of multioperational information processing [Monograph] / T. B. Martynyuk - Vinnytsia: "UNIVERSUM-Vinnytsia", 2000. - 216 p.
  17. Class ECE6332 Fall 12 Group-Fault-Tolerant Reconfigurable PPA. http://venividiwiki.ee.virginia.edu/mediawiki/index.php/ClassECE6332Fall....