This paper is suggested the methods of improving the structures of high-speed single-bit and multi-bit binary adders with extremely high speed and minimal hardware complexity are proposed. It is proposed to simplify the structure of the logical element “Exclusive OR" by implementing on the basis of the logical element “Exclusive AND". Improved structures of single-digit incomplete adders based on the logic element “Exclusive AND" are proposed. The comparative estimations of structural, functional and relative functional and structural complexity of their schematical implementations are given. The structures of full single-digit adders with advanced functionality are proposed. The structural and functional characteristics of circuit design solutions of such single-digit adders are given. The optimization of the structure of multi-bit combinational adders is proposed. Pyramidal multipath combinational combiners with single-phase and single-phase information links are investigated. The comparative characteristics of the estimates of the structural complexity of combinational adders depending on the bit rate of the source codes are presented.
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