An efficiency of the application-specific processors (ASP) optimization design using C2HDL Chameleon tool and Altera IDE is explored. ASP optimization design supposes to perform the following actions: the set of ASP IP cores synthesis, their FPGA implementation and comparative analysis, optimal version selection according to given criterion. The set of 64- point and 128-poimt FFT processors are synthesized for this by Chameleon system, they are implemented in 5CSEMA5F31C6 Altera FPGA and their characteristics are estimated: resource utilization, maximal frequency, data latency and power consumption. As the result the new method of ASP design is formed.
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