Improving structural methods of adjustment of additive errors of DC voltage calibrators

In normal operating conditions the error correction is usually conducted shifting the transformation function of DC voltage calibrators by introducing a corrective quantity equal in value and opposite in sign to additive error. This additive error correction is performed in manual and automatic modes. Additive errors of DC voltage calibrators are mainly caused by zero bias of the transformation function of analog electronic components in electronic circuit and voltage drop in communication lines between different circuit nodes. The additive errors caused by the operational amplifier equivalent offset voltage, are added to the output voltage of DC voltage calibrator and converted into multiplicative errors through the use of code-control dividers. Additive errors of the output scale converters of DC voltage calibrators cause additive offset of output voltage. In addition, they can also occur during the passage of supply current of different device units through the common communication lines between them. The structural and technological methods are used to reduce these errors. The review of additive error adjusting methods by means of inverting switching is conducted. Therefore, to use the additive error adjusting methods in DC voltage calibrator it is necessary to conduct their research and improvement. The method of additive error adjusting based by means of inverting switching DC voltage calibrator with analog memory elements of switching bipolar signals is improved. The block diagram of the DC voltage calibrator with double inversion is analyzed. The graphics dependences of additive error for different values of frequency clock generator, time delay and transmission rate of code-controlled divider are considered. The dependences of output voltage error value from the output signals delay formation are also investigated. Based on the analysis shows that the main drawback to switching-inverting method is the effect of forming precision pulse control keys and signals delay formation arising from the lack of speed switching transients and key operational amplifiers and code-controlled divider. To eliminate the influence of outputs transients proposed output elements of operational amplifier are stored in analog memory. A structural diagram output of DC voltage calibrator with analog memory elements. A description of scheme and given equation output voltage. From these equations shows that the resulting delay from switching the input and output signals create multiplicative error on frequency clock generator and time value delay. Under this factor of multiplicative error can be adjusted change in transmission kodecontrolled divider for a clock frequency generator of value. Improved principle scheme of separate units DC voltage calibrator with automatic errors correction and conducted its investigation and presented graphic dependences of the output voltage changes of the combiner. Analysis of graphical dependences shows that amplitude of the variable component of combiner output depends on the time constant memory elements and adder. When τ = 18 ms value variable component equal to 0.25 mV at a clock generator frequency of 1000 Hz and 0.5 mV at a frequency of 500 Hz. To reduce the variable component of the voltage at the output combiner is applied passive filter on condenser C3 and active at operational amplifier DA2. Accordingly, for the variable component value less than 1 mVmust apply suppression filter coefficient K = 47 dB at a clock generator frequency of 1000 Hz and K = 54 dB at a frequency of 500Hz. Computer research determined that the applied filter reduces a variable component not exceed to 1 mV. The proposed method of component additive error correction DC voltage calibrator from inverting switching voltage source model and output amplifier with switching signal analog memory elements output amplifier completely component additive errors corrects and improves dynamic performance DC voltage calibrator.