multiplier

Analysis of multiplication algorithms in Galuis fields for the cryptographic protection of information

The mathematical basis for processing a digital signature is elliptic curves. The processing of the points of an elliptic curve is based on the operations performed in the Galois fields GF(pm). Fields with a simple foundation are not well-studied and very interesting for research. In this paper, a comparison of the complexity of algorithms for the realization of the multiplication operation in Galois fields GF(pm) with different bases is carried out. Conducts a comparison of the 3 most common  multiplication algorithms.

Особливості виконання операції множення елементів полів Галуа GF(2m) та GF(3m)

The article describes development of Galois field GF(3m) elements multiplier. Designed multiplier architecture is scaleable. The multiplier is used in digital signature device which are based on elliptic curves. Also verification method for operations over elements of the Galois fields GF (pm) with help of mathematical package Maple is described.

Multiplier realization in FPGA of the high level Galois fields.

In this paper, the implementation of matrix multipliers of the Galois fields with basics 2, 3, 5, 7, 13 and the analysis of the implementation of multipliers with a higher basis on the FPGA Xilinx Spartan-6 and Altera – Cyclone-5 is considered. It is shown that the smallest hardware costs will be in multiples of Galois fields with a base 2. For the implementation of the Guild cells with a large foundation, the core generator of the modified Guild cells was implemented.

Galois Fields Elements Processing Units for Cryptographic Data Protection in Cyber-Physical Systems

Currently, elliptic curves are the mathematical basis for digital signature processing. Elliptic curve points processing is based on the performance of operations in Galois field GF(2m) in normal or polynomial bases. Characteristics of multipliers for these bases are different. In this paper, the time complexity of software multipliers for binary Galois fields GF(2m) and fields GF(dn) was investigated. Fields with approximately the same number of elements were investigated. Elements of these fields were represented in a polynomial basis.

Апаратні витрати помножувачів полів Галуа GF (dm) з великою основою

The  paper  compares  realised  on  modern  FPGA  Galois  fields  GF  (dm)  elements 
multipliers hardware costs for great basis d to determine the field in which the multiplier has 
the  lowest hardware complexity. Guild cell internal structure consisting of modul n multiplier 
and adder. It is shown that hardware costs will have a constant value 4 which tends to increase 
when the foundations of the field.

Definition of the extended Galois field GF(dm) with multiplier minimal hardware complexity

The paper compares realised on modern FPGA Galois fields multipliers hardware costs to select Galois field GF(dm) with approximately the same number of elements and the lowest multiplier hardware complexity. The total increase in hardware costs depending on the increase of the basics of the field has been demonstrated. Local minimums for odd d correspond to d = 2i-1 and the global minimum for analysis based on Guild cell with realization like single unit corresponds to the value d = 3 and based on Guild cell with its multiplier and adder separate realization – the value d=7.

Galois Field Elements Multiplier Structural Complexity Evaluation

The article describes the results of evaluation of structural complexity of multi-section binary Galois fields elements multipliers. Elements of the fields are presented in the normal basis of type 2. The order of the field reaches 998. The hardware complexity multipliers allows to implement them on the FPGA. But because of the large structural complexity for certain combinations of the order of the field and the number of sections it is impossible. To identify ways to reduce structural complexity it and its components in main multiplier element – the multiplier matrix are estimated.

Features of ternary Galois fields elements processing on modern element basis.

Features of ternary Galois fields GF(3m) elements processing operation units development for modern component base considered in this article. It is shown that operations execution over ternary Galois fields elements have several advantages over binary Galois fields ones. Moving to ternary elements of Galois fields operations decreases lookup table (LUT) redundancy in modern field programmable gate arrays (FPGA) and reduce hardware costs.