The principles of design and operation of the multiprocessor self-configurabre FPGAbased computer systems are proposed in the article. The method of information processing and the structure of such system are developed. Its timing characteristics are explored. The conditions are determined necessary to achieve the high performance by the multiprocessor self-configurable computer system, and the approaches to implement these conditions are analyzed.
field programmable gate arrays
Computer systems performance is today improved with two major approaches: general-purpose computer computing power increase (creation of multicore processors, multiprocessor computer systems, supercomputers), and adaptation of the computer hardware to the executed algorithm (class of algorithms). The last approach often provides application of hardware accelerators – ASIC-based and FPGA-based, also named reconfigurable, and is characterized by better performance / power consumption ratio and lower cost as compared to the general-purpose computers of equivalent performance.