Recurrent Logarithmic Analog-Digital Converters With a Constant Logarithm Base

: pp. 148 - 154
Lviv Polytechnic National University, Department of Computerized Automation Systems
Lviv Polytechnic National University, Department of Computerized Automation Systems
Lviv Polytechnic National University

In this work, a new conversion method is proposed, which makes it possible to implement recurrent logarithmic analog-to-digital converters (LADCs) with a constant base of the logarithm $(\zeta)$, in which the reference voltages are formed using a reference voltage divider composed of identical $L-$shaped links of resistors $R-R^{\prime \prime}$ and additional resistor $R^{\prime}$, and the values of the resistors are set according to the formulas
$R^{\prime}=\frac{\zeta}{1-\zeta} \cdot R$ and $R^{\prime \prime}=\frac{\zeta}{(1-\zeta)^2} \cdot R$.

The use of this method significantly simplifies the schematic solution of the recurrent LADC and makes it technological for integrated manufacturing. Electrical and mathematical models of recurrent LADCs with a constant base of the logarithm have been developed, which take into account the influence of changes in the structure of LADCs during the transformation process. Formulas for estimating the fundamental error and conversion time are given.

  1. Mychuda Z. R., Ilkanych K. I., Mychuda L. Z. Nowyj metod logaryfmichnoho analogo-cyfrowoho peretworennia // Zbirnyk naukowykh prac “Kompiuterni tekhnologii drukarstwa”, 2004, No. 12, p. 220–224.
  2. Mychuda Z., Mykyichuk M., Zhuravel I., Mychuda L., Szcześniak A., Szcześniak Z. New Method for Logarithmic  Analogue-to-Digital  Conversion  Using  Switched  Capacitors   with   a   Variable   Logarithmic Base. Electronics 2024, 13, 29.
  3. Kumar C., Pavan S. Power-Noise Trade-Offs in Continuous-Time Pipelined ADCs and Active Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 2023, 70, 3832–3842 [Google Scholar] [CrossRef].
  4. Oh D. R., Seo M. J., Ryu S. T. A 7-Bit Two-Step Flash ADC With Sample-and-Hold  Sharing Technique. IEEE J. Solid-State Circuits 2022, 57, 2791–2801 [Google Scholar] [CrossRef].
  5. Liang Y., Li C., Liu S., Zhu Z. A 14-b 20-MS/s 78.8 dB-SNDR Energy-Efficient SAR ADC With Background Mismatch Calibration and Noise-Reduction Techniques for Portable Medical Ultrasound Systems, in IEEE TBioCAS. IEEE Trans. Biomed. Circuits Syst. 2022, 16, 200–210 [Google Scholar] [CrossRef] [PubMed].
  6. Yi P., Liang Y., Liu S., Xu N., Fang L., Hao Y. A 625kHz-BW, 79.3dB-SNDR Second-Order Noise-Shaping SAR ADC Using High-Efficiency Error-Feedback Structure. IEEE Trans. Circuits Syst. II Express Briefs 2021, 69, 859–863. [Google Scholar] [CrossRef].
  7. Esmailiyan A., Du J., Siriburanon T., Schembari F., Staszewski R. B. Dickson-Charge-Pump-Based Voltage-to-Time Conversion for Time-Based ADCs in 28-Nm CMOS. IEEE Open J. Circuits Syst. 2021, 2, 23–31 [Google Scholar] [CrossRef].
  8. Santos M., Guilherme J., Horta N. Logarithmic Voltage-to-Time Converter for Analog-to-Digital Signal Conversion;    Springer     International     Publishing:     Berlin/Heidelberg,     Germany,     2019;     Available online: (accessed on 15 September 2023).
  9. Szcześniak A. Analiza Przetwarzania Sygnałów Logarytmicznego Przetwornika Analogowo-Cyfrowego z Sukcesywną Aproksymacją; Kielce University of Technology: Kielce, Poland, 2019; ISBN 978-83-65719-48-5 [Google Scholar].
  10. Shen Y., Zhu Z., Liu, S., Yang Y. A Reconfigurable 10-to-12-b 80-to-20-MS/s Bandwidth Scalable SAR ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 2017, 65, 51–60 [Google Scholar] [CrossRef].
  11. Petilli E. M. Logarithmic Analog to Digital Converter Devices and Methods Thereof. U.S. Patent 20170179972, 22 June 2017. [Google Scholar]
  12. Inagaki Y., Sugimori Y., Ioka E., Matsuya Y. Logarithmic Compression ADC Using Transient Response of a Comparator/IEICE TRANSACTIONS on Electronics. IEICE Trans. Electron. 2017, E100-C, 359–362 [Google Scholar] [CrossRef].
  13. Pagin M., Ortmanns M. Evaluation of logarithmic vs. linear ADCs for neural signal acquisition and reconstruction. In Proceedings of the 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, Jeju, Republic of Korea, 11–15 July 2017, pp. 4387–4390 [Google Scholar].
  14. Azarov O. D., Bilichenko N. O., Zakharchenko S. M. High-Speed High-Precision ADC with Charge Redistribution with Self-Calibrating Weight Redundancy: Monograph; VNTU: Vinnytsia, Ukraine, 2016; 140p, ISBN 978-966-641-665-3 [Google Scholar].
  15. Moon J. H., Kim D. Y., Song M. K. Logarithmic Single-Slope Analog Digital Convertor, Image Sensor Device and Thermometer Using the Same, And Method for Logarithmic Single-Slope Analog Digital Converting. Patent No. KR20110064514A, 15 June 2011 [Google Scholar].